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cool solutions forwireless connectivity xemics sa * email: info@xemics.com * web: www.xemics.com XE88LC03 ultra low-power microcontroller general description ? the XE88LC03 is an ultra low-power low-voltage microcontroller unit (mcu) with extremely high effi- ciency, allowing for 1 mips at 300ua at 2.4 v, and 8 x 8 bits multiplying in one clock cycle. XE88LC03 is available with on chip multiple-time- programmable (mtp) program memory. applications internet connected appliances portable, battery operated instruments rf system supervisor remote control hvac control key product features ultra low-power mcu 300 ua at 1 mips operation 6 ua at 32 khz operation 1 ua time keeping low-voltage operation (2.4 - 5.5 v supply voltage) 22kb(8kw)mtp,512+8bram 4counters pwm,uart analog matrix switching independant rc and crystal oscillators 5 reset, 17 interrupt, 8 event sources 100 years mtp flash retention at 55c ordering information reference memory type temperature package XE88LC03mi000 mtp flash -40c to 85c die XE88LC03mi015 mtp flash -40c to 85c so28 XE88LC03mi026 mtp flash -40c to 85c tqfp32 datasheet XE88LC03 data acquisition microcon tr oller
2 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 1 detailed pin description pin description position in so28 position in tqfp32 function name second function name type 1 13 vbat power positive power supply 2 14 vreg analog regulated supply 3 15 vpp vhigh/test special test mode/high voltage for mtp programing 4 16 xout oscout/ptck analog/input connection to xtal/ peripheral clock for test and mtp programing 5 17 xin oscin/crck analog/input connection to xtal/ coolrisc clock for test and mtp programing 6 18 vss power negative power supply, connected to substrate 7 19 pa(0) testin input input of port a/ data input for test and mtp programing/ counter a input 8 20 pa(1) testck input input of port a/ data clock for test and mtp programing/ counter b input 9 21 pa(2) input input of port a/ counter c input/ counter capture input 10 22 pa(3) input input of port a/ counter d input/ counter capture input 11 23 pa(4) input input of port a 12 24 pa(5) input input of port a 13 25 pa(6) input input of port a 14 26 pa(7) input input of port a 15 27 pc(0) input/output input-output of port c 16 28 pc(1) input/output input-output of port c 17 29 pc(2) input/output input-output of port c 18 30 pc(3) input/output input-output of port c 31 pc(4) input/output input-output of port c 32 pc(5) input/output input-output of port c 1 pc(6) input/output input-output of port c 2 pc(7) input/output input-output of port c 19 3 pb(0) testout input/output/analog input-output-analog of port b/ data output for test and mtp programing/ pwm output table 1.1: pin-out of the XE88LC03 in so28 and tqfp32 (see table ?io pins performances? on page 15 for drive capabilities of the pins) 1 2 3 4 5 6 28 27 26 25 24 23 22 21 20 19 18 17 16 15 xemics XE88LC03xi015 9920 vbat vreg vpp xout xin vgnd pa[0] pa[1] pa[2] pa[3] pa[4] pa[5] pa[6] pa[7] res reset pb[7] pb[6] pb[5] pb[4] pb[3] pb[2] pb[1] pb[0] pc[3] pc[2] pc[1] pc[0] figure 1.1: pinout of the XE88LC03 in sop28 package f igure 1.1: pinout of the XE88LC03 in tqfp32 package 1 2 3 4 5 6 7 8 10 12 14 16 18 20 22 24 26 28 30 xemics XE88LC03mi n9k1444 9920 device type production packaging date lot identification
3 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 20 4 pb(1) input/output/analog input-output-analog of port b/ pwm output 21 5 pb(2) input/output/analog input-output-analog of port b 22 6 pb(3) sou input/output/analog input-output-analog of port b, output pin of usrt 23 7 pb(4) s0/scl input/output/analog input-output-analog of port b/ clock pin of usrt 24 8 pb(5) s1/sin input/output/analog input-output-analog of port b/ data input or input-output pin of usrt 25 9 pb(6) tx input/output/analog input-output-analog of port b/ emission pin of uart 26 10 pb(7) rx input/output/analog input-output-analog of port b/ reception pin of uart 27 11 reset input reset pin (active high) 28 12 reserved analog to be connected to vss pin description position in so28 position in tqfp32 function name second function name type table 1.1: pin-out of the XE88LC03 in so28 and tqfp32 (see table ?io pins performances? on page 15 for drive capabilities of the pins)
4 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 2 absolute maximum ratings stresses beyond these listed in this chapter may cause permanent damage to the device. no functional operation is implied at or beyond these conditions. exposure to these conditions for an extended period may affect the device reliability. note: 1) for unprogrammed mtp devices. blocking bits and software must be rewritten in mtp de- vices if storage temperature exceedes storage temperature for programmed devices. these devices are esd sensitive. although these devices feature proprietary esd protection structures, permanent damage may occur on devices subjected to high energy electrostatic discharges. proper esd precautions have to be taken to avoid performance degradation or loss of functionality. parameter value remarks vbat with respect to vss -0.3v to 6.0v input voltage on any input pin vss-0.3v to vbat+0.3v storage temperature -55 cto125 c1 storage temperature for programmed mtp devices -40 cto85 c1 table 2.1: absolute maximum ratings
5 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 3 electrical characteristics all specification are -40c to 85c unless otherwise noted. rom operates up to 125c. note: 1) power supply: 2.4 v - 5.5 v, temperature is 27c. 2) < 10 erase cycles. 3) more cycles possible during development, with restraint retention 4) with 2 mhz clock, all instructions are using exactly 1 clock cycle 5) longer erase time may degrade retention 4cpu the XE88LC03 cpu is a low power risc core. it has 16 internal registers for efficient imple- mentation of the c compiler. its instruction set is made of 35 generic instructions, all coded on 22 bits, with 8 addressing modes. all instructions are executed in one clock cycle, including conditional jumps and 8x8 multiplication. operation conditions min typ max unit remarks power supply rom version 2.4 5.5 v mtp version 2.4 5.5 v operating speed 2.4 v to 5.5 v 0.032 2 mhz instruction cycle any instruction 500 ns 4 current requirement cpu running at 1 mips 310 ua 1 cpu running at 32 khz on xtal, rc off 10 ua 1 cpu halt, timer on xtal, rc off 1ua 1 cpu halt, timer on xtal, rc ready 1.7 ua 1 cpu halt, xtal off timer on rc at 100 khz 1.4 ua 1 voltage level detection 15 ua mtp flash instruction memory prog. voltage 11.5 v erase time 0.2 1 s 5 write/erase cycles 10 100 3 data retention 10 years 85c, 2 100 years 55c, 2 table 3.1: specifications and current requirement of the XE88LC03
6 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 5 memory organization the cpu uses a harvard architecture, so that memory is organized in two separated fields: program memory and data memory. as both memories are separated, the central processing unit can read/write data at the same time it loads an instruction. peripherals and system control registers are mapped on data memory space. program memory is made in one page. data is made of several 256 bytes pages. 5.1 program memory the program memory is implemented as multiple time programmable (mtp) flash memory or rom. the power consumption of mtp memory is linear with the access frequency (no sig- nificant static current). size of the mtp flash memory is 8192 x 22 bits (= 22 kbytes) 5.2 data memory the data memory is implemented as static random-access memory (ram). the ram size is 512 x 8 bits plus 8 low power ram bytes that require very low current when addressed. pro- grams using the low-power ram instead of ram will use even less current. block size address mtp 8192 x 22 h0000 - h1fff table 5.1: program addresses for mtp memory block size address lp ram 8 x 8 h0000 - h0007 ram 512 x 8 h0080 - h027f table 5.2: ram addresses figure 5.1: memory organization cpu program memory lp ram peripherals ram program address bus data address bus 22 bits wide 8 bits wide cpu registers instruction pipeline 8k instructions mtp 512 bytes 0h0000 0h1fff / 01hbff 0h0000 0h0010 0h0080 0h027f or 6k instructions rom
7 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6 registers list left column include register name and address. right columns include bit name, access (r: read, r0: always 0 when read, w: write, c: cleared by writing any value, c1: cleared by writing 1), and reset status (0 or 1) and signal. empty bits are reserved for future use and should not be written, neither should their read value be used for any purpose as it may change without notice. 6.1 peripherals mapping block size address page lp ram 8x8 h0000-h0007 page 0 system control 16x8 h0010-h001f port a 8x8 h0020-h0027 port b 8x8 h0028-h002f port c 4x8 h0030-h0033 reserved 4x8 h0034-h0037 mtp 4x8 h0038-h003b event 4x8 h003c-h003f interrupts control 8x8 h0040-h0047 reserved 8x8 h0048-h004f uart 8x8 h0050-h0057 counters 8x8 h0058-h005f zooming adc 8x8 h0060-h0067 reserved 12x8 h0068-h0073 dacs 8x8 h0074-h007b other (vld) 4x8 h007c-h007f ram1 128x8 h0080 - h00ff ram2 256x8 h0100 - h01ff page 1 ram3 128x8 h0200 - h027f page 2 table 6.1: peripherals addresses
8 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6.2 resets the reset source name is simplified in the following registers description. name mapping is in the next table. 6.3 low power ram low power ram is a small additionnal ram area with extremely low power requirement. reset source name in this document resetsystem global resetsynch resetpor cold resetcold resetpad resetpconf pconf resetsleep sleep table 6.2: reset signal name mapping name 7 6 5 4 3 2 1 0 address h0000 rw rw rw rw rw rw rw rw h0001 rw rw rw rw rw rw rw rw h0002 rw rw rw rw rw rw rw rw h0003 rw rw rw rw rw rw rw rw h0004 rw rw rw rw rw rw rw rw h0005 rw rw rw rw rw rw rw rw h0006 rw rw rw rw rw rw rw rw h0007 rw rw rw rw rw rw rw rw table 6.3: low power ram
9 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6.4 system, oscillator s, prescaler and watchdog 6.5 porta name 7 6 5 4 3 2 1 0 address regsysctrl sleepen enres- pconf enbus-error enreswd h0010, type 1 rw, 0 por rw, 0 cold rw, 0 cold rw, 0 cold regsysreset sleep respor resbus- error reswd resporta respad-deb respad h0011, type 1 w, 0 cold r, 0 rc, 0 cold rc, 0 cold rc, 0 cold rc, 0 cold rc, 0 cold regsysclock cpusel extclk enextclk biasrc coldxtal coldrc enablextal enablerc h0012, type 1 rw, 0 sleep r, 0 cold rw, 0 cold rw, 1 cold r, 1 sleep r, 1 sleep rw, 0 sleep rw, 1 sleep regsysmisc rconpa0 debfast output- ckxtal output- ckcpu h0013, type 1 rw, 0 sleep rw, 0 sleep rw, 0 sleep rw, 0 sleep regsyswd watchdog(3) watchdog(2) watchdog(1) watchdog(0) h0014 special special special special regsyspre0 respre clearlow- prescal (*) h0015 w, 0 cold regsysrctrim1 rcfreq- range rcfreq- coarse(3) rcfreq- coarse(2) rcfreq- coarse(1) rcfreq- coarse(0) h001b rw, 0 cold rw, 0 cold rw, 0 cold rw, 0 cold rw, 0 cold regsysrctrim2 rcfreq- fine(5) rcfreq- fine(4) rcfreq- fine(3) rcfreq- fine(2) rcfreq- fine(1) rcfreq- fine(0) h001c rw, 1 cold rw, 0 cold rw, 0 cold rw, 0 cold rw, 0 cold rw, 0 cold table 6.4: system control registers name 7 6 5 4 3 2 1 0 address regpain pain(7) regpain(6) pain(5) pain(4) pain(3) pain(2) pain(1) pain(0) h0020 rrrrrrrr regpadebounce padeb(7) padeb(6) padeb(5) padeb(4) padeb(3) padeb(2) padeb(1) padeb(0) h0021 rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpaedge paedge(7) paedge(6) paedge(5) paedge(4) paedge(3) paedge(2) paedge(1) paedge(0) h0022 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regpapullup papullup(7) papullup(6) papullup(5) papullup(4) papullup(3) papullup(2) papullup(1) papullup(0) h0023, type 1 rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpares0 pares0(7) pares0(6) pares0(5) pares0(4) pares0(3) pares0(2) pares0(1) pares0(0) h0024 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regpares1 pares1(7) pares1(6) pares1(5) pares1(4) pares1(3) pares1(2) pares1(1) pares1(0) h0025 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global table 6.5: port a registers
10 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6.6 portb 6.7 portc 6.8 mtp name 7 6 5 4 3 2 1 0 address regpbout pbout(7) pbout(6) pbout(5) pbout(4) pbout(3) pbout(2) pbout(1) pbout(0) h0028 rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpbin pbin(7) pbin(6) pbin(5) pbin(4) pbin(3) pbin(2) pbin(1) pbin(0) h0029 rrrrrrrr regpbdir pbdir(7) pbdir(6) pbdir(5) pbdir(4) pbdir(3) pbdir(2) pbdir(1) pbdir(0) h002a rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpbopen pbopen(7) pbopen(6) pbopen(5) pbopen(4) pbopen(3) pbopen(2) pbopen(1) pbopen(0) h002b rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpbpullup pbpullup(7) pbpullup(6) pbpullup(5) pbpullup(4) pbpullup(3) pbpullup(2) pbpullup(1) pbpullup(0) h002c rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpbana pbana(3) pbana(2) pbana(1) pbana(0) h002d rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf table 6.6: port b registers name 7 6 5 4 3 2 1 0 address regpcout pcout(7) pcout(6) pcout(5) pcout(4) pcout(3) pcout(2) pcout(1) pcout(0) h0030 rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf regpcin pcin(7) pcin(6) pcin(5) pcin(4) pcin(3) pcin(2) pcin(1) pcin(0) h0031 rrrrrrrr regpcdir pcdir(7) pcdir(6) pcdir) pcdir(4) pcdir(3) pcdir(2) pcdir(1) pcdir(0) h0032 rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf rw, 0 pconf table 6.7: port c registers name 7 6 5 4 3 2 1 0 address regeep h0038 rw rw rw rw rw rw rw rw regeep1 h0039 rw rw rw rw rw rw rw rw regeep2 h003a special special special special special special special special regeep3 h003b special special special special special special special special table 6.8: mtp control registers
11 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6.9 events 6.10 interrupts 6.11 usrt name 7 6 5 4 3 2 1 0 address regevn evncnta evncntc evnpre1 evnpa(1) evncntb evncntd evnpre2 evnpa(0) h003c rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global regevnen evnencnta evnencntc evnenpre1 evnenpa(1) evnencntb evnencntd evnenpre2 evnenpa(0) h003d rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regevnpriority evnpriority(7) evnpriority(6) evnpriority(5) evnpriority(4) evnpriority(3) evnpriority(2) evnpriority(1) evnpriority(0) h003e r,1 global r,1 global r,1 global r,1 global r,1 global r,1 global r,1 global r,1 global regevnevn evnhigh evnlow h003f r,0global r,0global table 6.9: events control registers name 7 6 5 4 3 2 1 0 address regirqhig irqpre1 irqcnta irqcntc irquarttx irquartrx h0040 rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global regirqmid irqpa(5) irqpa(4) irqpre2 irqvld irqpa(1) irqpa(0) h0041 rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global regirqlow irqpa(7) irqpa(6) irqcntb irqcntd irqpa(3) irqpa(2) h0042 rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global rc1, 0 global regirqenhig irqenpre1 irqencnta irqencntc irqenuarttx irqenuartrx h0043 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regirqenmid irqenpa(5) irqenpa(4) irqenpre2 irqenvld irqenpa(1) irqenpa(0) h0044 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regirqenlow irqenpa(7) irqenpa(6) irqencntb irqencntd irqenpa(3) irqenpa(2) h0045 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global regirqpriority irqpriority(7) irqpriority(6) irqpriority(5) irqpriority(4) irqpriority(3) irqpriority(2) irqpriority(1) irqpriority(0) h0046 r, 1 global r, 1 global r, 1 global r, 1 global r, 1 global r, 1 global r, 1 global r, 1 global regirqirq irqhig irqmid irqlow h0047 r, 0 global r, 0 global r, 0 global table 6.10: interrupts control registers name 7 6 5 4 3 2 1 0 address regusrtsin usrtsin h0048 rw, 1 global regusrtscl usrtscl h0049 rw, 1 global regusrtctrl usrtwaits0 usrtenwait- cond1 usrtenwaits0 usrtenable h004a r, 0 global rw, 0 global rw, 0 global rw, 0 global regusrtdata usrtdata h004d r regusrtedgescl usrtedgescl h004e r, 0 global table 6.11: usrt control registers
12 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 6.12 uart 6.13 counters 6.14 vld registers name 7 6 5 4 3 2 1 0 address reguartctrl uartecho uartenrx uartentx uartxrx uartxtx uartbr(2) uartbr(1) uartbr(0) h0050 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 1 global rw, 0 global rw, 1 global reguartcmd selxtal uartwakeup uartrcsel(2) uartrcsel(1) uartrcsel(0) uartpm uartpe uartwl h0051 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 1 global reguarttx uarttx(7) uarttx(6) uarttx(5) uarttx(4) uarttx(3) uarttx(2) uarttx(1) uarttx(0) h0052 rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw, 0 global reguarttxsta uarttxbusy uarttxfull h0053 r,0global r,0global reguartrx uartrx(7) uartrx(6) uartrx(5) uartrx(4) uartrx(3) uartrx(2) uartrx(1) uartrx(0) h0054 rrrrrrrr reguartrxsta uartrxserr uartrxperr uartrxferr uartrxoerr uartrxbusy uartrxfull h0055 rrrcrr table 6.12: uart control registers name 7 6 5 4 3 2 1 0 address regcnta countera(7) countera(6) countera(5) countera(4) countera(3) countera(2) countera(1) countera(0) h0058 rw rw rw rw rw rw rw rw regcntb counterb(7) counterb(6) counterb(5) counterb(4) counterb(3) counterb(2) counterb(1) counterb(0) h0059 rw rw rw rw rw rw rw rw regcntc counterc(7) counterc(6) counterc(5) counterc(4) counterc(3) counterc(2) counterc(1) counterc(0) h005a rw rw rw rw rw rw rw rw regcntd counterd(7) counterd(6) counterd(5) counterd(4) counterd(3) counterd(2) counterd(1) counterd(0) h005b rw rw rw rw rw rw rw rw regcntctrlck cntdsel(1) cntdsel(0) cntcsel(1) cntcsel(0) cntbsel(1) cntbsel(0) cntasel(1) cntasel(0) h005c rw rw rw rw rw rw rw rw regcntconfig1 cntddownup cntcdownup cntbdownup cntadownup cascadecd cascadeab cntpwm1 cntpwm0 h005d rw rw rw rw rw rw rw, 0 global rw, 0 global regcntconfig2 capsel(1) capsel(0) capfunc(1) capfunc(0) pwm1size(1) pwm1size(0) pwm0size(1) pwm0size(0) h005e rw, 0 global rw, 0 global rw, 0 global rw, 0 global rw rw rw rw regcnton cntdenable cntcenable cntbenable cntaenable h005f rw, 0 global rw, 0 global rw, 0 global rw, 0 global table 6.13: counters control registers name 7 6 5 4 3 2 1 0 address regvldctrl vldmult vldtune(2) vldtune(1) vldtune(0) h007e rw, 0 cold rw, 0 cold rw, 0 cold rw, 0 cold regvldstat vldirq vldvalid vlden h007f r, 0 global r, 0 global rw, 0 global table 6.14: vmult and vld control registers
13 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 7 peripherals the XE88LC03 includes usual microcontroller peripherals and some other blocks more spe- cific to low-voltage or mixed-signal operation. there are 3 parallel ports, one input port (a), one io and analog port (b) with analog switching capabilities and one general purpose io port (c). a watchdog is available, connected to a prescaler. four 8-bit counters, with capture, pwm and chaining capabilities are available. the uart can handle transmission speeds as high as 115kbaud. low-power low-voltage blocks include a voltage level detector, two oscillators (one internal 0.1-2 mhz rc oscillator and a 32 khz crystal oscillator) and a specific regulation scheme that largely uncouples current requirement from external power supply (usual cmos asics re- quire much more current at 5.5 v than they need at 2.4 v. this is not the case for the XE88LC03). 7.1 counters 4 8-bit counters daisy chain on 16 bits pwm on 8-16 bits capture - compare on 16 bits events and interrupts generation 7.2 prescaler interrupt generated with 8 millisecond or 1 second period for ultra low power hiberna- tion mode 7.3 watchdog 2 seconds watchdog 7.4 uart full duplex operation with buffered receiver and transmitter. internal baud rate generator with programmable baud rate (300 - 115?000 bauds). 7 or 8 bits word length. even, odd, or no-parity bit generation and detection 1 stop bit error receive detection: start, parity, frame and overrun receiver echo mode 2 interrupts (receive full and transmit empty) enable receive and/or transmit invert pad rx and/or tx
14 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 7.5 xtal clock the xtal oscillator operates with an external crystal of 32?768 hz. note: board layout recommendations for safer crystal oscillation and lower current consumption: keep lines xtal_in and xtal_out short and insert a vss line between them. connect package of the crystal to vss. no noisy or digital lines near xtal_in and xtal_out. insert guards at vss where needed. 7.6 rc oscillator the rc oscillator is always turned on at power-on reset and can be turned off after the option- al xtal oscillator has been started. the rc oscillator has two frequency ranges: sub-mhz (100khz to 1mhz) and above-mhz (1mhz to max mcu frequency). inside a range, the fre- quency can be tuned by software for coarse and fine adjustment. note: no external component is required for the rc oscillator. the rc oscillator can be in 3 modes. in mode 1(rc on), the rc oscillator and its bias are on. in mode 2 (rc ready), the rc oscillator is off and the bias is on. in mode 3 (rc off), the rc oscillator and the bias are off. rc ready mode is a compromise between power consumption and start-up time. symbol description min typ max unit comments f_clk32k nominal frequency 32768 hz st_x32k oscillator start-up time 1 2 s for full precision duty_clk32k duty cycle on the digital output 30 50 70 % fstab_1 relative frequency deviation from nominal, for a crystal with cl=8.2 pf and temperature between -40 and +85c -100 +300 ppm not included: crystal frequency tolerance and aging crystal frequency - temperature dependence table 7.1: xtal oscillator specifications. figure 7.1: rc frequencies programming example for low range (typical values)
15 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 7.7 parallel io ports 8 bit input port a with interrupt, reset and event generation. 8 bit input-output-analog port b with analog switching capabilities. 8 bit input-output port c. symbol description min typ max unit comments f st frequency at start-up 40 80 120 khz at 27 c range range selection 1 10 multiplies f st mult[3:0] coarse tuning range 1 16 4 bits, multiplies f st * range tune[5:0] fine tuning range 0.65 1.5 6 bits, multiplies f st * range * mult fine tuning step 1.4 2 % t st start-up time 30 50 ms bias current is off (rc off) o st overshoot at start-up 50 % bias current is off (rc off) t wu wakeup time 3 5 ms bias current is on (rc ready) o wu overshoot at wakeup 50 % bias current is on (rc ready) jit jitter rms 2 o / oo tdf temperature drift 0.1 %/ c table 7.2: rc specifications sym description condition min typ max unit comments port a: low threshold limit vbat = 2.4 v 1 v 0.4 vbat port a: high threshold limit 1.5 v 0.6 vbat output drop when sinking 1 ma v output drop when sinking 8 ma 0.4 v output drop when sourcing 1 ma v output drop when sourcing 8 ma 0.4 v port a: low threshold limit vbat = 5.0 v 2 v 0.4 vbat port a: high threshold limit 3 v 0.6 vbat output drop when sinking 1 ma v output drop when sinking 8 ma 0.4 v output drop when sourcing 1 ma v output drop when sourcing 8 ma 0.4 v pull-up, pull-down resistor 50 150 kohm table 7.3: io pins performances
16 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 7.8 voltage level detector can be switched off, on or simultaneously with cpu activities generates an interrupt if power supply is below a pre-determined level the voltage level detector monitors the state of the system battery. it returns a logical high value (an interrupt) in the status register if the supplied voltage drops below the user defined level. note: 1) absolute precision of the threshold voltage is 10%. 2) this timing is respected in case the internal rc or crystal oscillators are selected. refer to the clock block documentation in case the external clock is used. symbol description min typ max unit comments vth threshold voltage note 1 v trimming values: vldrange vldtune 3.06 1 000 2.88 1 001 2.72 1 010 2.57 1 011 2.44 1 100 2.33 1 101 2.22 1 110 2.13 1 111 t eom duration of measurement 2.0 2.5 ms note 2 t pw minimum pulse width detected 875 1350 us note 2 table 7.4: voltage level detector operation
17 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 8 physical description 8.1 packages: 8.2 die: figure 8.1: tqfp32 package, size in mm. figure 8.2: so28 package, size in mm. figure 8.3: die. chip size is 4.0 x 3.5 mm2 for 0.3 mm thickness. physical chip size and exact pad positioning can change without notification. pin 1
18 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 8.2.1 bonding pad location coordinates start with a point near to the bottom left border (with respect to above picture). x is horizontal, y is vertical. padsizeis85x85um. symbol pad x y symbol pad x y um um um um 1 pc(5) 123 3493.9 21 xout 3015.2 118 2 pc(6) 123 3221.9 22 xin 3282.0 413.6 3 pc(7) 123 2949.8 23 vss 3282.0 998.2 4 nc 123 2677.8 24 pa(0) 3282.0 1833.4 5 pb(0) 123 2442.6 25 pa(1) 3282.0 2484.0 6 pb(1) 123 2165.6 26 nc 3282.0 2768.6 7 pb(2) 123 1538.6 27 pa(2) 3282.0 3103.8 8 pb(3) 123 1261.6 28 pa(3) 3282.0 3313.4 9 nc 123 984.6 29 pa(4) 3282.0 3523.0 10 pb(4) 123 729.4 30 pa(5) 3114.6 3785.0 11 pb(5) 123 452.4 31 pa(6) 2930.0 3785.0 12 pb(6) 340.4 118 32 nc 2745.4 3785.0 13 pb(7) 617.4 118 33 pa(7) 2510.2 3785.0 14 reset 894.4 118 34 pc(0) 1870.8 3785.0 15 nc 1079.0 118 35 pc(1) 1498.8 3785.0 16 vss 1314.2 118 36 pc(2) 1226.7 3785.0 17 vbat 1809.9 118 37 nc 954.7 3785.0 18 nc 2045.1 118 38 pc(3) 719.5 3785.0 19 vreg 2280.3 118 39 pc(4) 447.4 3785.0 20 vpp 2532.9 118 table 8.1: bonding pads location. do not connect pads named nc. pads 16, 23 and substrate must be connected to vss.
19 d0202-59 datasheet XE88LC03 data acquisition microcon tr oller 9 contacting xemics you will find more information about the XE88LC03 and other xemics products, as well as the addresses of our representatives and distributors for your region on http://www.xemics.com. ? xemics 2002 all rights reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. xemics products are not designed, intended, authorized or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. inclusion of xemics products in such applications is understood to be undertaken solely at the customer?s own risk. should a customer purchase or use xemics products for any such unauthorized application, the customer shall indemnify and hold xemics and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.

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